spif.c 37 KB

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  1. /************************************************************************************************************
  2. ************** Include Headers
  3. ************************************************************************************************************/
  4. #include "spif.h"
  5. #if SPIF_DEBUG == SPIF_DEBUG_DISABLE
  6. #define dprintf(...)
  7. #else
  8. #include <stdio.h>
  9. #define dprintf(...) printf(__VA_ARGS__)
  10. #endif
  11. #if SPIF_RTOS == SPIF_RTOS_DISABLE
  12. #elif SPIF_RTOS == SPIF_RTOS_CMSIS_V1
  13. #include "cmsis_os.h"
  14. #include "freertos.h"
  15. #elif SPIF_RTOS == SPIF_RTOS_CMSIS_V2
  16. #include "cmsis_os2.h"
  17. #include "freertos.h"
  18. #elif SPIF_RTOS == SPIF_RTOS_THREADX
  19. #include "app_threadx.h"
  20. #endif
  21. /************************************************************************************************************
  22. ************** Private Definitions
  23. ************************************************************************************************************/
  24. #define SPIF_DUMMY_BYTE 0xA5
  25. #define SPIF_CMD_READSFDP 0x5A
  26. #define SPIF_CMD_ID 0x90
  27. #define SPIF_CMD_JEDECID 0x9F
  28. #define SPIF_CMD_UNIQUEID 0x4B
  29. #define SPIF_CMD_WRITEDISABLE 0x04
  30. #define SPIF_CMD_READSTATUS1 0x05
  31. #define SPIF_CMD_READSTATUS2 0x35
  32. #define SPIF_CMD_READSTATUS3 0x15
  33. #define SPIF_CMD_WRITESTATUSEN 0x50
  34. #define SPIF_CMD_WRITESTATUS1 0x01
  35. #define SPIF_CMD_WRITESTATUS2 0x31
  36. #define SPIF_CMD_WRITESTATUS3 0x11
  37. #define SPIF_CMD_WRITEENABLE 0x06
  38. #define SPIF_CMD_ADDR4BYTE_EN 0xB7
  39. #define SPIF_CMD_ADDR4BYTE_DIS 0xE9
  40. #define SPIF_CMD_PAGEPROG3ADD 0x02
  41. #define SPIF_CMD_PAGEPROG4ADD 0x12
  42. #define SPIF_CMD_READDATA3ADD 0x03
  43. #define SPIF_CMD_READDATA4ADD 0x13
  44. #define SPIF_CMD_FASTREAD3ADD 0x0B
  45. #define SPIF_CMD_FASTREAD4ADD 0x0C
  46. #define SPIF_CMD_SECTORERASE3ADD 0x20
  47. #define SPIF_CMD_SECTORERASE4ADD 0x21
  48. #define SPIF_CMD_BLOCKERASE3ADD 0xD8
  49. #define SPIF_CMD_BLOCKERASE4ADD 0xDC
  50. #define SPIF_CMD_CHIPERASE1 0x60
  51. #define SPIF_CMD_CHIPERASE2 0xC7
  52. #define SPIF_CMD_SUSPEND 0x75
  53. #define SPIF_CMD_RESUME 0x7A
  54. #define SPIF_CMD_POWERDOWN 0xB9
  55. #define SPIF_CMD_RELEASE 0xAB
  56. #define SPIF_CMD_FRAMSERNO 0xC3
  57. #define SPIF_STATUS1_BUSY (1 << 0)
  58. #define SPIF_STATUS1_WEL (1 << 1)
  59. #define SPIF_STATUS1_BP0 (1 << 2)
  60. #define SPIF_STATUS1_BP1 (1 << 3)
  61. #define SPIF_STATUS1_BP2 (1 << 4)
  62. #define SPIF_STATUS1_TP (1 << 5)
  63. #define SPIF_STATUS1_SEC (1 << 6)
  64. #define SPIF_STATUS1_SRP0 (1 << 7)
  65. #define SPIF_STATUS2_SRP1 (1 << 0)
  66. #define SPIF_STATUS2_QE (1 << 1)
  67. #define SPIF_STATUS2_RESERVE1 (1 << 2)
  68. #define SPIF_STATUS2_LB0 (1 << 3)
  69. #define SPIF_STATUS2_LB1 (1 << 4)
  70. #define SPIF_STATUS2_LB2 (1 << 5)
  71. #define SPIF_STATUS2_CMP (1 << 6)
  72. #define SPIF_STATUS2_SUS (1 << 7)
  73. #define SPIF_STATUS3_RESERVE1 (1 << 0)
  74. #define SPIF_STATUS3_RESERVE2 (1 << 1)
  75. #define SPIF_STATUS3_WPS (1 << 2)
  76. #define SPIF_STATUS3_RESERVE3 (1 << 3)
  77. #define SPIF_STATUS3_RESERVE4 (1 << 4)
  78. #define SPIF_STATUS3_DRV0 (1 << 5)
  79. #define SPIF_STATUS3_DRV1 (1 << 6)
  80. #define SPIF_STATUS3_HOLD (1 << 7)
  81. /************************************************************************************************************
  82. ************** Private Functions
  83. ************************************************************************************************************/
  84. void SPIF_Delay(uint32_t Delay);
  85. void SPIF_Lock(SPIF_HandleTypeDef *Handle);
  86. void SPIF_UnLock(SPIF_HandleTypeDef *Handle);
  87. void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select);
  88. bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout);
  89. bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout);
  90. bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout);
  91. bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle);
  92. bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle);
  93. uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle);
  94. uint8_t SPIF_ReadReg2(SPIF_HandleTypeDef *Handle);
  95. uint8_t SPIF_ReadReg3(SPIF_HandleTypeDef *Handle);
  96. bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data);
  97. bool SPIF_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data);
  98. bool SPIF_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data);
  99. bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout);
  100. bool SPIF_FindChip(SPIF_HandleTypeDef *Handle);
  101. bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset);
  102. bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size);
  103. /***********************************************************************************************************/
  104. void SPIF_Delay(uint32_t Delay)
  105. {
  106. #if SPIF_RTOS == SPIF_RTOS_DISABLE
  107. HAL_Delay(Delay);
  108. #elif (SPIF_RTOS == SPIF_RTOS_CMSIS_V1) || (SPIF_RTOS == SPIF_RTOS_CMSIS_V2)
  109. uint32_t d = (configTICK_RATE_HZ * Delay) / 1000;
  110. if (d == 0)
  111. d = 1;
  112. osDelay(d);
  113. #elif SPIF_RTOS == SPIF_RTOS_THREADX
  114. uint32_t d = (TX_TIMER_TICKS_PER_SECOND * Delay) / 1000;
  115. if (d == 0)
  116. d = 1;
  117. tx_thread_sleep(d);
  118. #endif
  119. }
  120. /***********************************************************************************************************/
  121. void SPIF_Lock(SPIF_HandleTypeDef *Handle)
  122. {
  123. while (Handle->Lock)
  124. {
  125. SPIF_Delay(1);
  126. }
  127. Handle->Lock = 1;
  128. }
  129. /***********************************************************************************************************/
  130. void SPIF_UnLock(SPIF_HandleTypeDef *Handle)
  131. {
  132. Handle->Lock = 0;
  133. }
  134. /***********************************************************************************************************/
  135. void SPIF_CsPin(SPIF_HandleTypeDef *Handle, bool Select)
  136. {
  137. HAL_GPIO_WritePin(Handle->Gpio, Handle->Pin, (GPIO_PinState)Select);
  138. for (int i = 0; i < 10; i++);
  139. }
  140. /***********************************************************************************************************/
  141. bool SPIF_TransmitReceive(SPIF_HandleTypeDef *Handle, uint8_t *Tx, uint8_t *Rx, size_t Size, uint32_t Timeout)
  142. {
  143. bool retVal = false;
  144. #if (SPIF_PLATFORM == SPIF_PLATFORM_HAL)
  145. if (HAL_SPI_TransmitReceive(Handle->HSpi, Tx, Rx, Size, Timeout) == HAL_OK)
  146. {
  147. retVal = true;
  148. }
  149. else
  150. {
  151. dprintf("SPIF TIMEOUT\r\n");
  152. }
  153. #elif (SPIF_PLATFORM == SPIF_PLATFORM_HAL_DMA)
  154. uint32_t startTime = HAL_GetTick();
  155. if (HAL_SPI_TransmitReceive_DMA(Handle->HSpi, Tx, Rx, Size) != HAL_OK)
  156. {
  157. dprintf("SPIF TRANSFER ERROR\r\n");
  158. }
  159. else
  160. {
  161. while (1)
  162. {
  163. SPIF_Delay(1);
  164. if (HAL_GetTick() - startTime >= Timeout)
  165. {
  166. dprintf("SPIF TIMEOUT\r\n");
  167. HAL_SPI_DMAStop(Handle->HSpi);
  168. break;
  169. }
  170. if (HAL_SPI_GetState(Handle->HSpi) == HAL_SPI_STATE_READY)
  171. {
  172. retVal = true;
  173. break;
  174. }
  175. }
  176. }
  177. #endif
  178. return retVal;
  179. }
  180. /***********************************************************************************************************/
  181. bool SPIF_Transmit(SPIF_HandleTypeDef *Handle, uint8_t *Tx, size_t Size, uint32_t Timeout)
  182. {
  183. bool retVal = false;
  184. #if (SPIF_PLATFORM == SPIF_PLATFORM_HAL)
  185. if (HAL_SPI_Transmit(Handle->HSpi, Tx, Size, Timeout) == HAL_OK)
  186. {
  187. retVal = true;
  188. }
  189. else
  190. {
  191. dprintf("SPIF TIMEOUT\r\n");
  192. }
  193. #elif (SPIF_PLATFORM == SPIF_PLATFORM_HAL_DMA)
  194. uint32_t startTime = HAL_GetTick();
  195. if (HAL_SPI_Transmit_DMA(Handle->HSpi, Tx, Size) != HAL_OK)
  196. {
  197. dprintf("SPIF TRANSFER ERROR\r\n");
  198. }
  199. else
  200. {
  201. while (1)
  202. {
  203. SPIF_Delay(1);
  204. if (HAL_GetTick() - startTime >= Timeout)
  205. {
  206. dprintf("SPIF TIMEOUT\r\n");
  207. HAL_SPI_DMAStop(Handle->HSpi);
  208. break;
  209. }
  210. if (HAL_SPI_GetState(Handle->HSpi) == HAL_SPI_STATE_READY)
  211. {
  212. retVal = true;
  213. break;
  214. }
  215. }
  216. }
  217. #endif
  218. return retVal;
  219. }
  220. /***********************************************************************************************************/
  221. bool SPIF_Receive(SPIF_HandleTypeDef *Handle, uint8_t *Rx, size_t Size, uint32_t Timeout)
  222. {
  223. bool retVal = false;
  224. #if (SPIF_PLATFORM == SPIF_PLATFORM_HAL)
  225. if (HAL_SPI_Receive(Handle->HSpi, Rx, Size, Timeout) == HAL_OK)
  226. {
  227. retVal = true;
  228. }
  229. else
  230. {
  231. dprintf("SPIF TIMEOUT\r\n");
  232. }
  233. #elif (SPIF_PLATFORM == SPIF_PLATFORM_HAL_DMA)
  234. uint32_t startTime = HAL_GetTick();
  235. if (HAL_SPI_Receive_DMA(Handle->HSpi, Rx, Size) != HAL_OK)
  236. {
  237. dprintf("SPIF TRANSFER ERROR\r\n");
  238. }
  239. else
  240. {
  241. while (1)
  242. {
  243. SPIF_Delay(1);
  244. if (HAL_GetTick() - startTime >= Timeout)
  245. {
  246. dprintf("SPIF TIMEOUT\r\n");
  247. HAL_SPI_DMAStop(Handle->HSpi);
  248. break;
  249. }
  250. if (HAL_SPI_GetState(Handle->HSpi) == HAL_SPI_STATE_READY)
  251. {
  252. retVal = true;
  253. break;
  254. }
  255. }
  256. }
  257. #endif
  258. return retVal;
  259. }
  260. /***********************************************************************************************************/
  261. bool SPIF_WriteEnable(SPIF_HandleTypeDef *Handle)
  262. {
  263. bool retVal = true;
  264. uint8_t tx[1] = {SPIF_CMD_WRITEENABLE};
  265. SPIF_CsPin(Handle, 0);
  266. if (SPIF_Transmit(Handle, tx, 1, 100) == false)
  267. {
  268. retVal = false;
  269. dprintf("SPIF_WriteEnable() Error\r\n");
  270. }
  271. SPIF_CsPin(Handle, 1);
  272. return retVal;
  273. }
  274. /***********************************************************************************************************/
  275. bool SPIF_WriteDisable(SPIF_HandleTypeDef *Handle)
  276. {
  277. bool retVal = true;
  278. uint8_t tx[1] = {SPIF_CMD_WRITEDISABLE};
  279. SPIF_CsPin(Handle, 0);
  280. if (SPIF_Transmit(Handle, tx, 1, 100) == false)
  281. {
  282. retVal = false;
  283. dprintf("SPIF_WriteDisable() Error\r\n");
  284. }
  285. SPIF_CsPin(Handle, 1);
  286. return retVal;
  287. }
  288. /***********************************************************************************************************/
  289. uint8_t SPIF_ReadReg1(SPIF_HandleTypeDef *Handle)
  290. {
  291. uint8_t retVal = 0;
  292. uint8_t tx[2] = {SPIF_CMD_READSTATUS1, SPIF_DUMMY_BYTE};
  293. uint8_t rx[2];
  294. SPIF_CsPin(Handle, 0);
  295. if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true)
  296. {
  297. retVal = rx[1];
  298. }
  299. SPIF_CsPin(Handle, 1);
  300. return retVal;
  301. }
  302. /***********************************************************************************************************/
  303. uint8_t SPIF_ReadReg2(SPIF_HandleTypeDef *Handle)
  304. {
  305. uint8_t retVal = 0;
  306. uint8_t tx[2] = {SPIF_CMD_READSTATUS2, SPIF_DUMMY_BYTE};
  307. uint8_t rx[2];
  308. SPIF_CsPin(Handle, 0);
  309. if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true)
  310. {
  311. retVal = rx[1];
  312. }
  313. SPIF_CsPin(Handle, 1);
  314. return retVal;
  315. }
  316. /***********************************************************************************************************/
  317. uint8_t SPIF_ReadReg3(SPIF_HandleTypeDef *Handle)
  318. {
  319. uint8_t retVal = 0;
  320. uint8_t tx[2] = {SPIF_CMD_READSTATUS3, SPIF_DUMMY_BYTE};
  321. uint8_t rx[2];
  322. SPIF_CsPin(Handle, 0);
  323. if (SPIF_TransmitReceive(Handle, tx, rx, 2, 100) == true)
  324. {
  325. retVal = rx[1];
  326. }
  327. SPIF_CsPin(Handle, 1);
  328. return retVal;
  329. }
  330. /***********************************************************************************************************/
  331. bool SPIF_WriteReg1(SPIF_HandleTypeDef *Handle, uint8_t Data)
  332. {
  333. bool retVal = true;
  334. uint8_t tx[2] = {SPIF_CMD_WRITESTATUS1, Data};
  335. uint8_t cmd = SPIF_CMD_WRITESTATUSEN;
  336. do
  337. {
  338. SPIF_CsPin(Handle, 0);
  339. if (SPIF_Transmit(Handle, &cmd, 1, 100) == false)
  340. {
  341. retVal = false;
  342. SPIF_CsPin(Handle, 1);
  343. break;
  344. }
  345. SPIF_CsPin(Handle, 1);
  346. SPIF_CsPin(Handle, 0);
  347. if (SPIF_Transmit(Handle, tx, 2, 100) == false)
  348. {
  349. retVal = false;
  350. SPIF_CsPin(Handle, 1);
  351. break;
  352. }
  353. SPIF_CsPin(Handle, 1);
  354. } while (0);
  355. return retVal;
  356. }
  357. /***********************************************************************************************************/
  358. bool SPIF_WriteReg2(SPIF_HandleTypeDef *Handle, uint8_t Data)
  359. {
  360. bool retVal = true;
  361. uint8_t tx[2] = {SPIF_CMD_WRITESTATUS2, Data};
  362. uint8_t cmd = SPIF_CMD_WRITESTATUSEN;
  363. do
  364. {
  365. SPIF_CsPin(Handle, 0);
  366. if (SPIF_Transmit(Handle, &cmd, 1, 100) == false)
  367. {
  368. retVal = false;
  369. SPIF_CsPin(Handle, 1);
  370. break;
  371. }
  372. SPIF_CsPin(Handle, 1);
  373. SPIF_CsPin(Handle, 0);
  374. if (SPIF_Transmit(Handle, tx, 2, 100) == false)
  375. {
  376. retVal = false;
  377. SPIF_CsPin(Handle, 1);
  378. break;
  379. }
  380. SPIF_CsPin(Handle, 1);
  381. } while (0);
  382. return retVal;
  383. }
  384. /***********************************************************************************************************/
  385. bool SPIF_WriteReg3(SPIF_HandleTypeDef *Handle, uint8_t Data)
  386. {
  387. bool retVal = true;
  388. uint8_t tx[2] = {SPIF_CMD_WRITESTATUS3, Data};
  389. uint8_t cmd = SPIF_CMD_WRITESTATUSEN;
  390. do
  391. {
  392. SPIF_CsPin(Handle, 0);
  393. if (SPIF_Transmit(Handle, &cmd, 1, 100) == false)
  394. {
  395. retVal = false;
  396. SPIF_CsPin(Handle, 1);
  397. break;
  398. }
  399. SPIF_CsPin(Handle, 1);
  400. SPIF_CsPin(Handle, 0);
  401. if (SPIF_Transmit(Handle, tx, 2, 100) == false)
  402. {
  403. retVal = false;
  404. SPIF_CsPin(Handle, 1);
  405. break;
  406. }
  407. SPIF_CsPin(Handle, 1);
  408. } while (0);
  409. return retVal;
  410. }
  411. /***********************************************************************************************************/
  412. bool SPIF_WaitForWriting(SPIF_HandleTypeDef *Handle, uint32_t Timeout)
  413. {
  414. bool retVal = false;
  415. uint32_t startTime = HAL_GetTick();
  416. while (1)
  417. {
  418. SPIF_Delay(1);
  419. if (HAL_GetTick() - startTime >= Timeout)
  420. {
  421. dprintf("SPIF_WaitForWriting() TIMEOUT\r\n");
  422. break;
  423. }
  424. if ((SPIF_ReadReg1(Handle) & SPIF_STATUS1_BUSY) == 0)
  425. {
  426. retVal = true;
  427. break;
  428. }
  429. }
  430. return retVal;
  431. }
  432. /***********************************************************************************************************/
  433. bool SPIF_FindChip(SPIF_HandleTypeDef *Handle)
  434. {
  435. uint8_t tx[4] = {SPIF_CMD_JEDECID, 0xFF, 0xFF, 0xFF};
  436. uint8_t rx[4];
  437. bool retVal = false;
  438. do
  439. {
  440. dprintf("SPIF_FindChip()\r\n");
  441. SPIF_CsPin(Handle, 0);
  442. if (SPIF_TransmitReceive(Handle, tx, rx, 4, 100) == false)
  443. {
  444. SPIF_CsPin(Handle, 1);
  445. break;
  446. }
  447. SPIF_CsPin(Handle, 1);
  448. dprintf("CHIP ID: 0x%02X%02X%02X\r\n", rx[1], rx[2], rx[3]);
  449. Handle->Manufactor = rx[1];
  450. Handle->MemType = rx[2];
  451. Handle->Size = rx[3];
  452. dprintf("SPIF MANUFACTURE: ");
  453. switch (Handle->Manufactor)
  454. {
  455. case SPIF_MANUFACTOR_WINBOND:
  456. dprintf("WINBOND");
  457. break;
  458. case SPIF_MANUFACTOR_SPANSION:
  459. dprintf("SPANSION");
  460. break;
  461. case SPIF_MANUFACTOR_MICRON:
  462. dprintf("MICRON");
  463. break;
  464. case SPIF_MANUFACTOR_MACRONIX:
  465. dprintf("MACRONIX");
  466. break;
  467. case SPIF_MANUFACTOR_ISSI:
  468. dprintf("ISSI");
  469. break;
  470. case SPIF_MANUFACTOR_GIGADEVICE:
  471. dprintf("GIGADEVICE");
  472. break;
  473. case SPIF_MANUFACTOR_AMIC:
  474. dprintf("AMIC");
  475. break;
  476. case SPIF_MANUFACTOR_SST:
  477. dprintf("SST");
  478. break;
  479. case SPIF_MANUFACTOR_HYUNDAI:
  480. dprintf("HYUNDAI");
  481. break;
  482. case SPIF_MANUFACTOR_FUDAN:
  483. dprintf("FUDAN");
  484. break;
  485. case SPIF_MANUFACTOR_ESMT:
  486. dprintf("ESMT");
  487. break;
  488. case SPIF_MANUFACTOR_INTEL:
  489. dprintf("INTEL");
  490. break;
  491. case SPIF_MANUFACTOR_SANYO:
  492. dprintf("SANYO");
  493. break;
  494. case SPIF_MANUFACTOR_FUJITSU:
  495. dprintf("FUJITSU");
  496. break;
  497. case SPIF_MANUFACTOR_EON:
  498. dprintf("EON");
  499. break;
  500. case SPIF_MANUFACTOR_PUYA:
  501. dprintf("PUYA");
  502. break;
  503. default:
  504. Handle->Manufactor = SPIF_MANUFACTOR_ERROR;
  505. dprintf("ERROR");
  506. break;
  507. }
  508. dprintf(" - MEMTYPE: 0x%02X", Handle->MemType);
  509. dprintf(" - SIZE: ");
  510. switch (Handle->Size)
  511. {
  512. case SPIF_SIZE_1MBIT:
  513. Handle->BlockCnt = 2;
  514. dprintf("1 MBIT\r\n");
  515. break;
  516. case SPIF_SIZE_2MBIT:
  517. Handle->BlockCnt = 4;
  518. dprintf("2 MBIT\r\n");
  519. break;
  520. case SPIF_SIZE_4MBIT:
  521. Handle->BlockCnt = 8;
  522. dprintf("4 MBIT\r\n");
  523. break;
  524. case SPIF_SIZE_8MBIT:
  525. Handle->BlockCnt = 16;
  526. dprintf("8 MBIT\r\n");
  527. break;
  528. case SPIF_SIZE_16MBIT:
  529. Handle->BlockCnt = 32;
  530. dprintf("16 MBIT\r\n");
  531. break;
  532. case SPIF_SIZE_32MBIT:
  533. Handle->BlockCnt = 64;
  534. dprintf("32 MBIT\r\n");
  535. break;
  536. case SPIF_SIZE_64MBIT:
  537. Handle->BlockCnt = 128;
  538. dprintf("64 MBIT\r\n");
  539. break;
  540. case SPIF_SIZE_128MBIT:
  541. Handle->BlockCnt = 256;
  542. dprintf("128 MBIT\r\n");
  543. break;
  544. case SPIF_SIZE_256MBIT:
  545. Handle->BlockCnt = 512;
  546. dprintf("256 MBIT\r\n");
  547. break;
  548. case SPIF_SIZE_512MBIT:
  549. Handle->BlockCnt = 1024;
  550. dprintf("512 MBIT\r\n");
  551. break;
  552. default:
  553. Handle->Size = SPIF_SIZE_ERROR;
  554. dprintf("ERROR\r\n");
  555. break;
  556. }
  557. Handle->SectorCnt = Handle->BlockCnt * 16;
  558. Handle->PageCnt = (Handle->SectorCnt * SPIF_SECTOR_SIZE) / SPIF_PAGE_SIZE;
  559. dprintf("SPIF BLOCK CNT: %ld\r\n", Handle->BlockCnt);
  560. dprintf("SPIF SECTOR CNT: %ld\r\n", Handle->SectorCnt);
  561. dprintf("SPIF PAGE CNT: %ld\r\n", Handle->PageCnt);
  562. dprintf("SPIF STATUS1: 0x%02X\r\n", SPIF_ReadReg1(Handle));
  563. dprintf("SPIF STATUS2: 0x%02X\r\n", SPIF_ReadReg2(Handle));
  564. dprintf("SPIF STATUS3: 0x%02X\r\n", SPIF_ReadReg3(Handle));
  565. retVal = true;
  566. } while (0);
  567. return retVal;
  568. }
  569. /***********************************************************************************************************/
  570. bool SPIF_WriteFn(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset)
  571. {
  572. bool retVal = false;
  573. uint32_t address = 0, maximum = SPIF_PAGE_SIZE - Offset;
  574. uint8_t tx[5];
  575. do
  576. {
  577. #if SPIF_DEBUG != SPIF_DEBUG_DISABLE
  578. uint32_t dbgTime = HAL_GetTick();
  579. #endif
  580. dprintf("SPIF_WritePage() START PAGE %ld\r\n", PageNumber);
  581. if (PageNumber >= Handle->PageCnt)
  582. {
  583. dprintf("SPIF_WritePage() ERROR PageNumber\r\n");
  584. break;
  585. }
  586. if (Offset >= SPIF_PAGE_SIZE)
  587. {
  588. dprintf("SPIF_WritePage() ERROR Offset\r\n");
  589. break;
  590. }
  591. if (Size > maximum)
  592. {
  593. Size = maximum;
  594. }
  595. address = SPIF_PageToAddress(PageNumber) + Offset;
  596. #if SPIF_DEBUG == SPIF_DEBUG_FULL
  597. dprintf("SPIF WRITING {\r\n0x%02X", Data[0]);
  598. for (int i = 1; i < Size; i++)
  599. {
  600. if (i % 8 == 0)
  601. {
  602. dprintf("\r\n");
  603. }
  604. dprintf(", 0x%02X", Data[i]);
  605. }
  606. dprintf("\r\n}\r\n");
  607. #endif
  608. if (SPIF_WriteEnable(Handle) == false)
  609. {
  610. break;
  611. }
  612. SPIF_CsPin(Handle, 0);
  613. if (Handle->BlockCnt >= 512)
  614. {
  615. tx[0] = SPIF_CMD_PAGEPROG4ADD;
  616. tx[1] = (address & 0xFF000000) >> 24;
  617. tx[2] = (address & 0x00FF0000) >> 16;
  618. tx[3] = (address & 0x0000FF00) >> 8;
  619. tx[4] = (address & 0x000000FF);
  620. if (SPIF_Transmit(Handle, tx, 5, 100) == false)
  621. {
  622. SPIF_CsPin(Handle, 1);
  623. break;
  624. }
  625. }
  626. else
  627. {
  628. tx[0] = SPIF_CMD_PAGEPROG3ADD;
  629. tx[1] = (address & 0x00FF0000) >> 16;
  630. tx[2] = (address & 0x0000FF00) >> 8;
  631. tx[3] = (address & 0x000000FF);
  632. if (SPIF_Transmit(Handle, tx, 4, 100) == false)
  633. {
  634. SPIF_CsPin(Handle, 1);
  635. break;
  636. }
  637. }
  638. if (SPIF_Transmit(Handle, Data, Size, 1000) == false)
  639. {
  640. SPIF_CsPin(Handle, 1);
  641. break;
  642. }
  643. SPIF_CsPin(Handle, 1);
  644. if (SPIF_WaitForWriting(Handle, 100))
  645. {
  646. dprintf("SPIF_WritePage() %d BYTES WITERN DONE AFTER %ld ms\r\n", (uint16_t)Size, HAL_GetTick() - dbgTime);
  647. retVal = true;
  648. }
  649. } while (0);
  650. SPIF_WriteDisable(Handle);
  651. return retVal;
  652. }
  653. /***********************************************************************************************************/
  654. bool SPIF_ReadFn(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size)
  655. {
  656. bool retVal = false;
  657. uint8_t tx[5];
  658. do
  659. {
  660. #if SPIF_DEBUG != SPIF_DEBUG_DISABLE
  661. uint32_t dbgTime = HAL_GetTick();
  662. #endif
  663. dprintf("SPIF_ReadAddress() START ADDRESS %ld\r\n", Address);
  664. SPIF_CsPin(Handle, 0);
  665. if (Handle->BlockCnt >= 512)
  666. {
  667. tx[0] = SPIF_CMD_READDATA4ADD;
  668. tx[1] = (Address & 0xFF000000) >> 24;
  669. tx[2] = (Address & 0x00FF0000) >> 16;
  670. tx[3] = (Address & 0x0000FF00) >> 8;
  671. tx[4] = (Address & 0x000000FF);
  672. if (SPIF_Transmit(Handle, tx, 5, 100) == false)
  673. {
  674. SPIF_CsPin(Handle, 1);
  675. break;
  676. }
  677. }
  678. else
  679. {
  680. tx[0] = SPIF_CMD_READDATA3ADD;
  681. tx[1] = (Address & 0x00FF0000) >> 16;
  682. tx[2] = (Address & 0x0000FF00) >> 8;
  683. tx[3] = (Address & 0x000000FF);
  684. if (SPIF_Transmit(Handle, tx, 4, 100) == false)
  685. {
  686. SPIF_CsPin(Handle, 1);
  687. break;
  688. }
  689. }
  690. if (SPIF_Receive(Handle, Data, Size, 2000) == false)
  691. {
  692. SPIF_CsPin(Handle, 1);
  693. break;
  694. }
  695. SPIF_CsPin(Handle, 1);
  696. dprintf("SPIF_ReadAddress() %d BYTES READ DONE AFTER %ld ms\r\n", (uint16_t)Size, HAL_GetTick() - dbgTime);
  697. #if SPIF_DEBUG == SPIF_DEBUG_FULL
  698. dprintf("{\r\n0x%02X", Data[0]);
  699. for (int i = 1; i < Size; i++)
  700. {
  701. if (i % 8 == 0)
  702. {
  703. dprintf("\r\n");
  704. }
  705. dprintf(", 0x%02X", Data[i]);
  706. }
  707. dprintf("\r\n}\r\n");
  708. #endif
  709. retVal = true;
  710. } while (0);
  711. return retVal;
  712. }
  713. /************************************************************************************************************
  714. ************** Public Functions
  715. ************************************************************************************************************/
  716. /**
  717. * @brief Initialize the SPIF.
  718. * @note Enable and configure the SPI and Set GPIO as output for CS pin on the CubeMX
  719. *
  720. * @param *Handle: Pointer to SPIF_HandleTypeDef structure
  721. * @param *HSpi: Pointer to a SPI_HandleTypeDef structure
  722. * @param *Gpio: Pointer to a GPIO_TypeDef structure for CS
  723. * @param Pin: Pin of CS
  724. *
  725. * @retval bool: true or false
  726. */
  727. bool SPIF_Init(SPIF_HandleTypeDef *Handle, SPI_HandleTypeDef *HSpi, GPIO_TypeDef *Gpio, uint16_t Pin)
  728. {
  729. bool retVal = false;
  730. do
  731. {
  732. if ((Handle == NULL) || (HSpi == NULL) || (Gpio == NULL) || (Handle->Inited == 1))
  733. {
  734. dprintf("SPIF_Init() Error, Wrong Parameter\r\n");
  735. break;
  736. }
  737. memset(Handle, 0, sizeof(SPIF_HandleTypeDef));
  738. Handle->HSpi = HSpi;
  739. Handle->Gpio = Gpio;
  740. Handle->Pin = Pin;
  741. SPIF_CsPin(Handle, 1);
  742. /* wait for stable VCC */
  743. while (HAL_GetTick() < 20)
  744. {
  745. SPIF_Delay(1);
  746. }
  747. if (SPIF_WriteDisable(Handle) == false)
  748. {
  749. break;
  750. }
  751. retVal = SPIF_FindChip(Handle);
  752. if (retVal)
  753. {
  754. Handle->Inited = 1;
  755. dprintf("SPIF_Init() Done\r\n");
  756. }
  757. } while (0);
  758. return retVal;
  759. }
  760. /***********************************************************************************************************/
  761. /**
  762. * @brief Full Erase chip.
  763. * @note Send the Full-Erase-chip command and wait for completion
  764. *
  765. * @param *Handle: Pointer to SPIF_HandleTypeDef structure
  766. *
  767. * @retval bool: true or false
  768. */
  769. bool SPIF_EraseChip(SPIF_HandleTypeDef *Handle)
  770. {
  771. SPIF_Lock(Handle);
  772. bool retVal = false;
  773. uint8_t tx[1] = {SPIF_CMD_CHIPERASE1};
  774. do
  775. {
  776. #if SPIF_DEBUG != SPIF_DEBUG_DISABLE
  777. uint32_t dbgTime = HAL_GetTick();
  778. #endif
  779. dprintf("SPIF_EraseChip() START\r\n");
  780. if (SPIF_WriteEnable(Handle) == false)
  781. {
  782. break;
  783. }
  784. SPIF_CsPin(Handle, 0);
  785. if (SPIF_Transmit(Handle, tx, 1, 100) == false)
  786. {
  787. SPIF_CsPin(Handle, 1);
  788. break;
  789. }
  790. SPIF_CsPin(Handle, 1);
  791. if (SPIF_WaitForWriting(Handle, Handle->BlockCnt * 1000))
  792. {
  793. dprintf("SPIF_EraseChip() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime);
  794. retVal = true;
  795. }
  796. } while (0);
  797. SPIF_WriteDisable(Handle);
  798. SPIF_UnLock(Handle);
  799. return retVal;
  800. }
  801. /***********************************************************************************************************/
  802. /**
  803. * @brief Erase Sector.
  804. * @note Send the Erase-Sector command and wait for completion
  805. *
  806. * @param *Handle: Pointer to SPIF_HandleTypeDef structure
  807. * @param Sector: Selected Sector
  808. *
  809. * @retval bool: true or false
  810. */
  811. bool SPIF_EraseSector(SPIF_HandleTypeDef *Handle, uint32_t Sector)
  812. {
  813. SPIF_Lock(Handle);
  814. bool retVal = false;
  815. uint32_t address = Sector * SPIF_SECTOR_SIZE;
  816. uint8_t tx[5];
  817. do
  818. {
  819. #if SPIF_DEBUG != SPIF_DEBUG_DISABLE
  820. uint32_t dbgTime = HAL_GetTick();
  821. #endif
  822. dprintf("SPIF_EraseSector() START SECTOR %ld\r\n", Sector);
  823. if (Sector >= Handle->SectorCnt)
  824. {
  825. dprintf("SPIF_EraseSector() ERROR Sector NUMBER\r\n");
  826. break;
  827. }
  828. if (SPIF_WriteEnable(Handle) == false)
  829. {
  830. break;
  831. }
  832. SPIF_CsPin(Handle, 0);
  833. if (Handle->BlockCnt >= 512)
  834. {
  835. tx[0] = SPIF_CMD_SECTORERASE4ADD;
  836. tx[1] = (address & 0xFF000000) >> 24;
  837. tx[2] = (address & 0x00FF0000) >> 16;
  838. tx[3] = (address & 0x0000FF00) >> 8;
  839. tx[4] = (address & 0x000000FF);
  840. if (SPIF_Transmit(Handle, tx, 5, 100) == false)
  841. {
  842. SPIF_CsPin(Handle, 1);
  843. break;
  844. }
  845. }
  846. else
  847. {
  848. tx[0] = SPIF_CMD_SECTORERASE3ADD;
  849. tx[1] = (address & 0x00FF0000) >> 16;
  850. tx[2] = (address & 0x0000FF00) >> 8;
  851. tx[3] = (address & 0x000000FF);
  852. if (SPIF_Transmit(Handle, tx, 4, 100) == false)
  853. {
  854. SPIF_CsPin(Handle, 1);
  855. break;
  856. }
  857. }
  858. SPIF_CsPin(Handle, 1);
  859. if (SPIF_WaitForWriting(Handle, 1000))
  860. {
  861. dprintf("SPIF_EraseSector() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime);
  862. retVal = true;
  863. }
  864. } while (0);
  865. SPIF_WriteDisable(Handle);
  866. SPIF_UnLock(Handle);
  867. return retVal;
  868. }
  869. /***********************************************************************************************************/
  870. /**
  871. * @brief Erase Block.
  872. * @note Send the Erase-Block command and wait for completion
  873. *
  874. * @param *Handle: Pointer to SPIF_HandleTypeDef structure
  875. * @param Sector: Selected Block
  876. *
  877. * @retval bool: true or false
  878. */
  879. bool SPIF_EraseBlock(SPIF_HandleTypeDef *Handle, uint32_t Block)
  880. {
  881. SPIF_Lock(Handle);
  882. bool retVal = false;
  883. uint32_t address = Block * SPIF_BLOCK_SIZE;
  884. uint8_t tx[5];
  885. do
  886. {
  887. #if SPIF_DEBUG != SPIF_DEBUG_DISABLE
  888. uint32_t dbgTime = HAL_GetTick();
  889. #endif
  890. dprintf("SPIF_EraseBlock() START PAGE %ld\r\n", Block);
  891. if (Block >= Handle->BlockCnt)
  892. {
  893. dprintf("SPIF_EraseBlock() ERROR Block NUMBER\r\n");
  894. break;
  895. }
  896. if (SPIF_WriteEnable(Handle) == false)
  897. {
  898. break;
  899. }
  900. SPIF_CsPin(Handle, 0);
  901. if (Handle->BlockCnt >= 512)
  902. {
  903. tx[0] = SPIF_CMD_BLOCKERASE4ADD;
  904. tx[1] = (address & 0xFF000000) >> 24;
  905. tx[2] = (address & 0x00FF0000) >> 16;
  906. tx[3] = (address & 0x0000FF00) >> 8;
  907. tx[4] = (address & 0x000000FF);
  908. if (SPIF_Transmit(Handle, tx, 5, 100) == false)
  909. {
  910. SPIF_CsPin(Handle, 1);
  911. break;
  912. }
  913. }
  914. else
  915. {
  916. tx[0] = SPIF_CMD_BLOCKERASE3ADD;
  917. tx[1] = (address & 0x00FF0000) >> 16;
  918. tx[2] = (address & 0x0000FF00) >> 8;
  919. tx[3] = (address & 0x000000FF);
  920. if (SPIF_Transmit(Handle, tx, 4, 100) == false)
  921. {
  922. SPIF_CsPin(Handle, 1);
  923. break;
  924. }
  925. }
  926. SPIF_CsPin(Handle, 1);
  927. if (SPIF_WaitForWriting(Handle, 3000))
  928. {
  929. dprintf("SPIF_EraseBlock() DONE AFTER %ld ms\r\n", HAL_GetTick() - dbgTime);
  930. retVal = true;
  931. }
  932. } while (0);
  933. SPIF_WriteDisable(Handle);
  934. SPIF_UnLock(Handle);
  935. return retVal;
  936. }
  937. /***********************************************************************************************************/
  938. /**
  939. * @brief Write data array to an Address
  940. * @note Write a data array with specified size.
  941. * @note All pages should be erased before write
  942. *
  943. * @param *Handle: Pointer to SPIF_HandleTypeDef structure
  944. * @param Address: Start Address
  945. * @param *Data: Pointer to Data
  946. * @param Size: The length of data should be written. (in byte)
  947. *
  948. * @retval bool: true or false
  949. */
  950. bool SPIF_WriteAddress(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size)
  951. {
  952. SPIF_Lock(Handle);
  953. bool retVal = false;
  954. uint32_t page, add, offset, remaining, length, maximum, index = 0;
  955. add = Address;
  956. remaining = Size;
  957. do
  958. {
  959. page = SPIF_AddressToPage(add);
  960. offset = add % SPIF_PAGE_SIZE;
  961. maximum = SPIF_PAGE_SIZE - offset;
  962. if (remaining <= maximum)
  963. {
  964. length = remaining;
  965. }
  966. else
  967. {
  968. length = maximum;
  969. }
  970. if (SPIF_WriteFn(Handle, page, &Data[index], length, offset) == false)
  971. {
  972. break;
  973. }
  974. add += length;
  975. index += length;
  976. remaining -= length;
  977. if (remaining == 0)
  978. {
  979. retVal = true;
  980. break;
  981. }
  982. } while (remaining > 0);
  983. SPIF_UnLock(Handle);
  984. return retVal;
  985. }
  986. /***********************************************************************************************************/
  987. /**
  988. * @brief Write data array to a Page
  989. * @note Write a data array with specified size.
  990. * @note The Page should be erased before write
  991. *
  992. * @param *Handle: Pointer to SPIF_HandleTypeDef structure
  993. * @param PageNumber: Page Number
  994. * @param *Data: Pointer to Data
  995. * @param Size: The length of data should be written. (in byte)
  996. * @param Offset: The start point for writing data. (in byte)
  997. *
  998. * @retval bool: true or false
  999. */
  1000. bool SPIF_WritePage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset)
  1001. {
  1002. SPIF_Lock(Handle);
  1003. bool retVal = false;
  1004. retVal = SPIF_WriteFn(Handle, PageNumber, Data, Size, Offset);
  1005. SPIF_UnLock(Handle);
  1006. return retVal;
  1007. }
  1008. /***********************************************************************************************************/
  1009. /**
  1010. * @brief Write data array to a Sector
  1011. * @note Write a data array with specified size.
  1012. * @note The Sector should be erased before write
  1013. *
  1014. * @param *Handle: Pointer to SPIF_HandleTypeDef structure
  1015. * @param SectorNumber: Sector Number
  1016. * @param *Data: Pointer to Data
  1017. * @param Size: The length of data should be written. (in byte)
  1018. * @param Offset: The start point for writing data. (in byte)
  1019. *
  1020. * @retval bool: true or false
  1021. */
  1022. bool SPIF_WriteSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, uint8_t *Data, uint32_t Size, uint32_t Offset)
  1023. {
  1024. SPIF_Lock(Handle);
  1025. bool retVal = true;
  1026. do
  1027. {
  1028. if (Offset >= SPIF_SECTOR_SIZE)
  1029. {
  1030. retVal = false;
  1031. break;
  1032. }
  1033. if (Size > (SPIF_SECTOR_SIZE - Offset))
  1034. {
  1035. Size = SPIF_SECTOR_SIZE - Offset;
  1036. }
  1037. uint32_t bytesWritten = 0;
  1038. uint32_t pageNumber = SectorNumber * (SPIF_SECTOR_SIZE / SPIF_PAGE_SIZE);
  1039. pageNumber += Offset / SPIF_PAGE_SIZE;
  1040. uint32_t remainingBytes = Size;
  1041. uint32_t pageOffset = Offset % SPIF_PAGE_SIZE;
  1042. while (remainingBytes > 0 && pageNumber < ((SectorNumber + 1) * (SPIF_SECTOR_SIZE / SPIF_PAGE_SIZE)))
  1043. {
  1044. uint32_t bytesToWrite = (remainingBytes > (SPIF_PAGE_SIZE - pageOffset)) ? (SPIF_PAGE_SIZE - pageOffset) : remainingBytes;
  1045. if (SPIF_WriteFn(Handle, pageNumber, Data + bytesWritten, bytesToWrite, pageOffset) == false)
  1046. {
  1047. retVal = false;
  1048. break;
  1049. }
  1050. bytesWritten += bytesToWrite;
  1051. remainingBytes -= bytesToWrite;
  1052. pageNumber++;
  1053. pageOffset = 0;
  1054. }
  1055. } while (0);
  1056. SPIF_UnLock(Handle);
  1057. return retVal;
  1058. }
  1059. /***********************************************************************************************************/
  1060. /**
  1061. * @brief Write data array to a Block
  1062. * @note Write a data array with specified size.
  1063. * @note The Block should be erased before write
  1064. *
  1065. * @param *Handle: Pointer to SPIF_HandleTypeDef structure
  1066. * @param SectorNumber: Block Number
  1067. * @param *Data: Pointer to Data
  1068. * @param Size: The length of data should be written. (in byte)
  1069. * @param Offset: The start point for writing data. (in byte)
  1070. *
  1071. * @retval bool: true or false
  1072. */
  1073. bool SPIF_WriteBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *Data, uint32_t Size, uint32_t Offset)
  1074. {
  1075. SPIF_Lock(Handle);
  1076. bool retVal = true;
  1077. do
  1078. {
  1079. if (Offset >= SPIF_BLOCK_SIZE)
  1080. {
  1081. retVal = false;
  1082. break;
  1083. }
  1084. if (Size > (SPIF_BLOCK_SIZE - Offset))
  1085. {
  1086. Size = SPIF_BLOCK_SIZE - Offset;
  1087. }
  1088. uint32_t bytesWritten = 0;
  1089. uint32_t pageNumber = BlockNumber * (SPIF_BLOCK_SIZE / SPIF_PAGE_SIZE);
  1090. pageNumber += Offset / SPIF_PAGE_SIZE;
  1091. uint32_t remainingBytes = Size;
  1092. uint32_t pageOffset = Offset % SPIF_PAGE_SIZE;
  1093. while (remainingBytes > 0 && pageNumber < ((BlockNumber + 1) * (SPIF_BLOCK_SIZE / SPIF_PAGE_SIZE)))
  1094. {
  1095. uint32_t bytesToWrite = (remainingBytes > (SPIF_PAGE_SIZE - pageOffset)) ? (SPIF_PAGE_SIZE - pageOffset) : remainingBytes;
  1096. if (SPIF_WriteFn(Handle, pageNumber, Data + bytesWritten, bytesToWrite, pageOffset) == false)
  1097. {
  1098. retVal = false;
  1099. break;
  1100. }
  1101. bytesWritten += bytesToWrite;
  1102. remainingBytes -= bytesToWrite;
  1103. pageNumber++;
  1104. pageOffset = 0;
  1105. }
  1106. } while (0);
  1107. SPIF_UnLock(Handle);
  1108. return retVal;
  1109. }
  1110. /***********************************************************************************************************/
  1111. /**
  1112. * @brief Read From Address
  1113. * @note Read data from memory and copy to array
  1114. *
  1115. * @param *Handle: Pointer to SPIF_HandleTypeDef structure
  1116. * @param Address: Start Address
  1117. * @param *Data: Pointer to Data (output)
  1118. * @param Size: The length of data should be written. (in byte)
  1119. *
  1120. * @retval bool: true or false
  1121. */
  1122. bool SPIF_ReadAddress(SPIF_HandleTypeDef *Handle, uint32_t Address, uint8_t *Data, uint32_t Size)
  1123. {
  1124. SPIF_Lock(Handle);
  1125. bool retVal = false;
  1126. retVal = SPIF_ReadFn(Handle, Address, Data, Size);
  1127. SPIF_UnLock(Handle);
  1128. return retVal;
  1129. }
  1130. /***********************************************************************************************************/
  1131. /**
  1132. * @brief Read a Page
  1133. * @note Read a page and copy to array
  1134. *
  1135. * @param *Handle: Pointer to SPIF_HandleTypeDef structure
  1136. * @param PageNumber: Page Number
  1137. * @param *Data: Pointer to Data (output)
  1138. * @param Size: The length of data should be read. (in byte)
  1139. * @param Offset: The start point for Reading data. (in byte)
  1140. *
  1141. * @retval bool: true or false
  1142. */
  1143. bool SPIF_ReadPage(SPIF_HandleTypeDef *Handle, uint32_t PageNumber, uint8_t *Data, uint32_t Size, uint32_t Offset)
  1144. {
  1145. SPIF_Lock(Handle);
  1146. bool retVal = false;
  1147. uint32_t address = SPIF_PageToAddress(PageNumber) + Offset;
  1148. uint32_t maximum = SPIF_PAGE_SIZE - Offset;
  1149. if (Size > maximum)
  1150. {
  1151. Size = maximum;
  1152. }
  1153. retVal = SPIF_ReadFn(Handle, address, Data, Size);
  1154. SPIF_UnLock(Handle);
  1155. return retVal;
  1156. }
  1157. /***********************************************************************************************************/
  1158. /**
  1159. * @brief Read a Sector
  1160. * @note Read a Sector and copy to array
  1161. *
  1162. * @param *Handle: Pointer to SPIF_HandleTypeDef structure
  1163. * @param SectorNumber: Sector Number
  1164. * @param *Data: Pointer to Data (output)
  1165. * @param Size: The length of data should be read. (in byte)
  1166. * @param Offset: The start point for Reading data. (in byte)
  1167. *
  1168. * @retval bool: true or false
  1169. */
  1170. bool SPIF_ReadSector(SPIF_HandleTypeDef *Handle, uint32_t SectorNumber, uint8_t *Data, uint32_t Size, uint32_t Offset)
  1171. {
  1172. SPIF_Lock(Handle);
  1173. bool retVal = false;
  1174. uint32_t address = SPIF_SectorToAddress(SectorNumber) + Offset;
  1175. uint32_t maximum = SPIF_SECTOR_SIZE - Offset;
  1176. if (Size > maximum)
  1177. {
  1178. Size = maximum;
  1179. }
  1180. retVal = SPIF_ReadFn(Handle, address, Data, Size);
  1181. SPIF_UnLock(Handle);
  1182. return retVal;
  1183. }
  1184. /***********************************************************************************************************/
  1185. /**
  1186. * @brief Read a Block
  1187. * @note Read a Block and copy to array
  1188. *
  1189. * @param *Handle: Pointer to SPIF_HandleTypeDef structure
  1190. * @param BlockNumber: Block Number
  1191. * @param *Data: Pointer to Data (output)
  1192. * @param Size: The length of data should be read. (in byte)
  1193. * @param Offset: The start point for Reading data. (in byte)
  1194. *
  1195. * @retval bool: true or false
  1196. */
  1197. bool SPIF_ReadBlock(SPIF_HandleTypeDef *Handle, uint32_t BlockNumber, uint8_t *Data, uint32_t Size, uint32_t Offset)
  1198. {
  1199. SPIF_Lock(Handle);
  1200. bool retVal = false;
  1201. uint32_t address = SPIF_BlockToAddress(BlockNumber) + Offset;
  1202. uint32_t maximum = SPIF_BLOCK_SIZE - Offset;
  1203. if (Size > maximum)
  1204. {
  1205. Size = maximum;
  1206. }
  1207. retVal = SPIF_ReadFn(Handle, address, Data, Size);
  1208. SPIF_UnLock(Handle);
  1209. return retVal;
  1210. }